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 DATA SHEET
LND3842A/43A/44A/45A LND3842B/43B/44B/45B Current Mode PWM Controller
GENERAL DESCRIPTION
The LND3842B/43B/44B/45B and LND3842A /43A/44A/45A are fixed frequency current mode PWM controllers. They are specially designed for OFF-line and DC to DC converter applications with a minimal of external components. Internally implemented circuits include a trimmed oscillator for precise duty cycle control, a temperature compensated reference, high gain error amplifier, current sensing comparator. Protection circuitry includes undervoltage lockout and current limiting. The LND3843B, A and LND3844B, A have UVLO thresholds of 16V(on) and 10 V (off). The corresponding thresholds for the LND3843B, A/ 45B,A are 8.4 V (on) and 7.6(off). The LND3842B, A and LND3843B, A can operate within 100% duty cycle. The LND3844B, A and LND3845B, A can operate within 50% duty cycle. The LND384XB has Start-Up current of .45mA(typ). The LND384XA has Start-Up current of .17mA(typ).
FEATURES
* * * * Low start-up and operating Current High Current Totem Pole Output Undervoltage Lockout with Hysterisis Operating Frequency up to 500KHZ
PIN CONFIGURATION
COMP V I
FB
1 2 3 4
8 7 6 5
V V
REF CC
SENSE T
OUT GND
R /C T
* Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com *
LND3842/43/44/45
ABSOLUTE MAXIMUM RATINGS
Characteristic Supply voltage (low impedance source) Output Current Input Voltage (Analog Inputs pins 2,3) Error Amp Output Sink Current Power Dissipation (TA =25C) Storage Temperature Range Lead Temperature ( soldering 5 sec.) Symbol Vcc IO VI ISINK(E.A) PO Tstg TL Value 30 1 -0.3 to 5.5 10 1 -65 to 150 260 Units V A V mA W C C
BLOCK DIAGRAM
VCC UVLO
SET/ 5V V REF RESET
7
8
VREF
36V GND
5
VREF LOGIC
INTERNAL BIAS
1/2 V REF +
POWER V REF ERR AMP
2R
C.S. COMP R PWM LATCH
7
2
VFB
R 1V
OUT
1
COMP
S
6
3 4
CURRENT SENSE T R T / CT OSCILLATOR
5
POWER GND
* Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com *
LND3842/43/44/45
ELECTRICAL CHARACTERISTICS
(*Vcc =15 V, RT=10k ,CT=3.3nF, TA=0 to 70 C, unless otherwise specified ) Characteristics Reference Section Reference Output Voltage Line Regulation Load Regulation Short Circuit Output Current Oscillator Section Oscillation Frequency Frequency change with Voltage Oscillator Amplitude Error Amplitude Section Input Bias Current Input Voltage Open Loop Voltage Gain Power Supply Rejection ratio Output Sink Current Output Source current High Output Voltage Low Output Voltage Current Sense Section Gain Maximum Input Signal Supply Voltage rejection Input Bias Current Output Section Low Output Voltage High Output Voltage Rise Time Fall time Symbol VREF VREF VREF ISC f f/Vcc V(OSC) IBIAS VI(E,A) AVOL PSRR ISINK ISOURCE VOH VOL GV VI(MAX) SVR IBIAS VOL VOH tR tF VTH(ST) VOPR(MIN) D(MAX) D(MAX) IST ICC(OPR) VZ LND3842A/43A/44A/45A LND3842B/43B/44B/45B VPIN3=VPIN2 =0V ICC=25mA 0.17 0.45 13 38 Test Conditions TJ =25C, IREF=1mA 12VVCC25V 1mA IREF20mA TA=25C TJ=25C 12VVCC25V (Peak to Peak) VFB=3V Vpin1=2.5V 2VVO4V 12VVCC25V Vpin2 =2.7V, Vpin1=1.1V Vpin2=2.3V, Vpin1=5V Vpin2=2.3V,RL=15k to GND Vpin2=2.7V,RL=15k t o PIN 8 (Note 1& 2) Vpin1 =5V(note 1) 12VVcc25V(note 1) Vpin3= 3V Isink=20mA Isink=200mA Isink=20mA Isink=200mA TJ=25C, CL =1nF(note 3) TJ=25C, CL =1nF(note 3) LND3842A,B/44A,B LND3842A,B/45A,B LND3842A,B/44A,B LND3842A,B/45A,B LND3842A,B/43A,B LND3842A,B/45A,B 47 Min 4.9 Typ 5.0 6.0 6.0 100 52 0.05 1.6 -0.1 2.5 90 70 7 -1.0 6.0 V 0.8 2.85 0.9 3.0 1.0 70 -3.0 0.08 1.4 13.5 13.0 45 35 14.5 7.8 8.5 7.0 95 47 16.0 8.4 10 7.6 97 48 1.1 3.15 1.1 -10 0.4 2.2 V/V V dB A -2 2.58 Max 5.1 20 25 180 57 1.0 Unit V mV mA KHz % V A V dB mA mA
65 60 2 -0.5 5.0
13 12
V
150 150 17.5 9.0 11.5 8.2 100 50 0 0.3 1 17
nS nS
Undervoltage Lockout Section Start Threshold Min. Operating Voltage (After Turn on) PWM Section Max. Duty Cycle Min. Duty cycle Total Standby Current Start-Up current Operating Supply Current Zener Voltage V V
%
mA mA V
30
*Adjust VCC above the start threshold before setting it to 15V.
* Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com *
LND3842/43/44/45
Note 1: Parameter measured at trip point of latch with Vpin2=0 Note 2: Gain defined as A=Vpin1/=Vpin3 : 0 Vpin30.8V. Note 3: These parameters, although guaranteed, are not 100% tested in production.
PIN DESCRIPTION
No 1 2 3 4 5 6 7 8
FUNCTION COMP VFB ISENSE RT/CT GROUND OUTPUT VCC VREF
DESCRIPTION This pin is the Error Amplifier output and is made for loop compensation This is the inverting input of the Error Amplifier. It is normally connected to the switching power supply output through a resistor divider. A voltage proportional to inductor current is connected to this input. The PWM uses this information to terminate the output switch conduction. The oscillator frequency and maximum Output duty cycle are programmed by connecting resistor RT to Vref and capacitor CT to ground. This pin is the combined control circuitry and power ground This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced and sinked by this pin. This pin is the positive supply of the integrated circuit. This is the reference output. It provides charging current for capacitor CT through resistor RT.
TYPICAL APPLICATIONS
2.5V
1mA +
2 1
-
Figure 1. Error Amp Configuration
* Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com *
LND3842/43/44/45
VCC
7
ON/OFF COMMAND TO S/R OF IC
ICC 13mA
LND3842 LND3844
LND3843 LND3845
VON VOFF
16V 10V
8.4V 7.6V
.2mA V CC VON During UVLO, the Output is low VOFF
Figure 2. Undervoltage Lockout
+
ERROR AMP
2R R 1V
V IS R RS C
FB
2 1 3
-
COMP
CURRENT SENSE
CURRENT SENSE COMPARATOR
5 GND
y
Peak current is determined by I S max
1.0V RS
Figure 3. Current Sense Circuit
* Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com *
LND3842/43/44/45
VREF RT IS RSLOPE R1 RS RT / CT ISENSE
8 LND3842 4 IS RSLOPE R1 5 GND RS
VREF RT RT / CT ISENSE
8 LND3842 4
3
3 5 GND
Figure 4. Slope Compensation Techniques
8
R R + 1mA BIAS
+
2 1 ERROR AMP
2R
-
R
5
SCR must be selected for a holding current of less than 0.5 mA. A simple two transistor circuit can be used in place of the SCR as shown. Figure 5. Latched Shutdown
* Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com *
LND3842/43/44/45
2.5V
+ 1mA
From VO Ri
+
2 1 ERROR AMP
2R
VFB Rf
-
R
Rd Cf
COMP
5
Error Amp compensation circuit f or stabilizing any current-mode topology except f or boost and f ly back conv erters operating with continuous inductor current.
2.5V
+ 1mA
From VO Rp Ri Rd Cf VFB Rf
+
2 1 ERROR AMP
2R
-
R
Cp
COMP
Error Amp compensation circuit f or stabilizing current-mode and f ly back topologies operating with continuous inductor current.
5
Figure 6. Error Amplifier Compensation
* Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com *
LND3842/43/44/45
VREF
8
R R RT BIAS
RT / CT
EXTERNAL SYNC INPUT
4
OSC
+ 1mA
CT 2 1
+
ERROR AMP
2R
.01F
47
-
R
5
Figure 7. External Clock Synchronization
8
R R
5Vref
+
BIAS
4
OSC + 1mA
+
2 1M 1 C 5 ERROR AMP
2R
+
R
S R
-
-
Figure 8. Soft-Start Circuit
* Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com *
LND3842/43/44/45
TYPICAL PERFORMANCE CHARACTERISTICS
RT (K )
50
%
C = 200pF CT = 100pF T 50 C = 500pF T CT = 1nF CT =1nF CT =2nF CT =5nF 20 C = 10nF T CT = 5nF CT =10nF CT = 2nF 10
20
10
5
5 CT =500pF
CT =200pF 2 Vcc =15V o TA =25 C 1 10 20 30 50 100 200 300 500 1 2 Vcc =15V o TA =25 C CT =100pF
f OSC (KHz)
10
20
30
50
100
200
300
500
f OSC (KHz)
Figure 1. Timing Resistor vs. Oscillator Frequency
Figure 2. Output Dead-Time vs. Oscillator Frequency
(dB)
90
80
Vcc = 15V VO = 2V to 4V
80
60
RL = 100K TA = 25 o C
70
40
60
20
50
0
40 1 2 3 4 5 6
-20 10 100 1K 10K 100K 1M
f (Hz)
Figure 3. Maximum Output Duty Cycle vs. Timing Resistor
Figure 4. Error Amp Open-Loop Gain vs. Frequency
* Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com *
LND3842/43/44/45
VTH (V)
1.0
ISC (mA)
100
0.8 TA = 125o C 0.6
90
80
0.4 TA = 25o C 0.2
70
60
50 1 2 3 4 5 6 7
VO (V)
0
25
50
75
100
T ( o C) A
Figure 5. Current Sense Input Threshold vs. Output
Figure 6. Reference Short Circuit Current vs. Temperature
VREF RT
8
7 5V REG PWM
CLOCK
RT / CT 6 OUTPUT OUTPUT LARGE R T / SMALL CT RT / C T OUTPUT
RT / CT CT
4
OSCILLATOR ID
5 GND
SMALL RT / Large CT
Figure 7. Oscillator and Output Waveforms
* Linear Dimensions, Inc. * 445 East Ohio Street, Chicago IL 60611 USA * tel 312.321.1810 * fax 312.321.1830 * www.lineardimensions.com *


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